VisSim/Comm
Overview
Features
Technical Specs
C Code Option
Demo Software
Viewlets
Pricing

Vector Ops Category Block Listing

The following blocks are included in the Vector Ops category :

Matrix to Vector
SubVector
Vector Bits to Symbol
Vector Demux
Vector Merge
Vector Mux
Vector Symbol to Bits
Vector to Matrix


Matrix to Vector

This block slices a M x N matrix into N or less independent column vectors. This block produces an updated output each time a “high” input clock is present.


SubVector

This block extracts a column vector of size N from a larger or equal sized column vector of size L This block produces an updated output each time a “high” input clock is present. When desiring to extract a subvector from a row vector, first convert the row vector to a column vector by using a matrix transpose block.


Vector Bits to Symbol

This block combines adjacent elements of a column vector (containing binary bits) into a smaller column vector composed of symbols. This block produces an updated output each time a “high” input clock is present. When desiring to operate on a row vector, first convert the row vector to a column vector by using a matrix transpose block.

The input vector length must be evenly divisible by the number of bits per symbol K. This block operates by combining successive groups of K bits into a corresponding sequence of output vector symbols.


Vector Demux

This block demultiplexes elements from a column vector into 2 or more smaller column vectors. This block produces an updated output each time a “high” input clock is present. When desiring to operate on a row vector, first convert the row vector to a column vector by using a matrix transpose block.

The output vectors can be forced to all be the same size through the use of padding when the number of output vectors N does not divide evenly into the input size vector M. Otherwise, one or more of the output vectors may be larger than others by one element. This block operates by stuffing elements from the input vector into each output vector in round robin fashion.


Vector Merge

This block appends a column vector of size M to another column vector of size L. The output vector will be of size N = L + M. The Vector Merge block automatically reads the size of the input vectors and computes the corresponding output vector size. Among other uses, the Vector Merge block can be used to zero pad a non power-or-two sized vector so that it can be used by the Vector FFT block.

This block produces an updated output each time a “high” input clock is present. This block has no internal parameters.


Vector Mux

This block multiplexes elements from two or more column vectors into a new vector. This block produces an updated output each time a “high” input clock is present. When desiring to operate on row vectors, first convert all row vectors to column vectors by using a matrix transpose block.

All input vectors must be of the same size L. The output size will then be a vector of length N x L, where N is the number of input vectors. The block operates by taking elements from each input vector in round robin fashion.


Vector Symbol to Bits

This block decomposes a column vector of symbol values into a larger column vector composed of binary bits. This block produces an updated output each time a “high” input clock is present. When desiring to operate on a row vector, first convert the row vector to a column vector by using a matrix transpose block.

This block operates by breaking up each symbol into its underlying binary bits and then outputting the K least significant bits. The output order of the K output bits is controlled by the MSB / LSB selection.


Vector to Matrix

This block assembles two or more column vectors into a matrix. This block produces an updated output each time a “high” input clock is present. When desiring to operate on row vectors, first convert all row vectors to column vectors by using a matrix transpose block.

All input vectors must be of the same size M. The output size will then be a matrix of size M x N, where N is the number of input vectors.